HARDWARE ACCELERATION FOR AI-BASED NOISE REMOVAL IN AUDIO SIGNALS

The objective of this thesis was to design and implement neural network’s architectures optimized for efficient deployment on hardware platforms, with a specific focus on neural networks for audio denoising applications. For the hardware implementation FPGA (Field-Programmable Gate Array) were used. In pursuit of the goal to develop a fully operational denoising neural network, this thesis concentrated on successfully implementing a small-scale Convolutional Neural Network (CNN). The project began with the creation of a basic neural network model to establish an understanding of fundamental principles. Building on this foundation, the study progressed to the development of a CNN, tailored to meet the demandsof noise removal techniques. This implementation demonstrated the feasibility of deploying CNNs on hardware platforms and provided valuable insights into performance and efficiency. The findings highlight the potential of hardware acceleration to enhance the processing capabilities of neural networks. This work contributes to the ongoing advancement of efficient neural network acceleration using FPGAs, laying a robust groundwork for future research and development in this field.